Execution Memo No. 014
New position; Pure play liquid cooling
It is once again time to reveal a new position of mine. This is a name that initially surfaced during my hunt for liquid cooling names. At the time I neither fully understood the stock, nor did I like the price, which had risen substantially in a very short time frame. Now the stock has come down and I feel confident enough to start a small position in the name.
The liquid cooling scene
First, let’s take a look at the liquid cooling scene. It is vital for understanding the bet here. As more and more money is funneled into AI and data centers running state of the art chips, several bottlenecks emerge. The bottleneck I am interested in is heat removal.
With each generation of chips the trend has remained the same: higher temperatures and thus a larger need for cooling. The core problem is that current single phase solutions become less efficient as temperatures rise.
I have previously written quite a bit about two phase cooling, and I still think two phase cooling looks like a pretty clear winner in the long run. However, I think there might still be room for other technologies that bridge the gap.
The pitch
Currently the market is dominated by traditional single phase cooling; it is the obvious solution. It works well, it is not too complicated and it is reliable enough. However, it likely won’t be very long before chips produce heat flux that can’t be handled by single phase. The main issue is that single phase doesn’t scale linearly in energy use and wear and tear. When scaled to handle more heat and higher heat flux, current single phase solutions start consuming far more energy via pumping power before eventually running into a complete wall, and they also wear out faster as you pump liquid through them at higher rates.
Two phase has the potential to fix this. Instead of having to pump a bunch of liquid at the chip’s metal encasing, two phase relies on the radically more effective heat transfer achieved by the change of state in the pumped liquid. In many ways two phase cooling seems like the obvious play. It doesn’t hit the same bottlenecks in heat transfer as single phase, and we already largely have the tech developed, with ZutaCore and Accelsius leading the push.
However, there are real problems with two phase cooling, and I think there might be space for other tech solutions to thrive in this rapidly expanding market. One of the main issues with two phase is complexity. Yes, we have two phase solutions in testing and even deployed, but questions about maintenance, scalability and reliability remain largely unanswered. Very few players have committed to two phase and chip producers haven’t given the nod yet. The tech is still years out from becoming the number one choice. And most importantly, heat transfer from metal to liquid, and the difference between boiling versus heating, isn’t the only path to radically improving heat removal.
Following the heat
To see where the gap is, you have to follow the heat from the transistor to the coolant. Heat doesn’t jump from the chip into the liquid; it crawls through a stack of layers, and every single layer adds resistance.
In a classic packaged chip, think a desktop CPU, the journey looks like this. Heat is generated in the silicon die, conducts through the silicon itself, passes through a thermal interface material filling the microscopic gaps between the die and the metal lid, then through the lid, then through a second interface layer between the lid and the cold plate, and finally through the cold plate’s base before it ever touches liquid.
Nvidia already understands that every one of these layers is a tax. Its flagship accelerators have stripped the stack down as far as the current architecture allows: H100, B200 and GB200 modules are bare die packages, with the cold plate pressing onto the silicon through a single layer of interface material. Even that last layer is a nuisance; it is a consumable that has to be replaced every time a cold plate comes off, and it remains one of the two dominant resistances in the whole chain.
The other dominant resistance is the one most people miss. Even once heat reaches the liquid, it isn’t home free. The liquid touching the metal barely moves; friction pins a thin film of near stationary fluid against the wall, the so called boundary layer. Heat has to conduct through this sluggish film before the flowing coolant can carry it away, and conduction through liquid is slow. In a modern direct to chip system, the interface material and the boundary layer together make up the bulk of the total thermal resistance.
So the entire game of chip cooling reduces to two questions: how do you get rid of the layers, and how do you kill the boundary layer.
Watch what Nvidia does, not what it says
Single phase answers both questions with force. The cold plates on a GB200 are already sophisticated pieces of engineering, copper bases with skived microchannel fins, but the recipe for more cooling never changes: push more liquid through finer channels to thin out the boundary layer, accept the rising pressure, and let the pumps pay for it in energy and wear. Vera Rubin, arriving this year, is that recipe taken to its logical extreme; the trays go fully fanless and the racks run nearly double the coolant flow at the same CDU pressure. For Rubin Ultra, the supply chain reporting points to microchannel cold plates where coolant runs directly across the die surface. Meanwhile Microsoft has demonstrated channels etched into the silicon itself, cutting peak temperature rise by 65 percent versus the best cold plates.
Put those data points in a row and the direction is unambiguous: the coolant is migrating toward the silicon. It started in the room, moved to the rack, then to a plate on the lid, then the lid was removed, and now it is heading for channels at the die and eventually channels inside the package. Every step of that migration strips one more layer of the tax. The industry has, without quite announcing it, agreed on the destination.
Now follow the migration to its endpoint and notice what the endpoint demands. A fluid that can touch live silicon without destroying it, which disqualifies water. A loop running at near zero pressure, because a bonded chip stack cannot take mechanical stress. A pump that works at chip scale, which disqualifies mechanical pumping outright; bearings, seals and impellers do not miniaturize. And control fine enough to chase hotspots that move around the die in milliseconds, which passive channels, sized once at manufacture for the worst case, fundamentally cannot do.
Neither of today’s camps is built for that specification. Single phase water fails on chemistry. Two phase fails inside the package, because managing boiling vapor within a bonded stack is a nightmare nobody has solved. The endpoint of the migration belongs to a third kind of solution, and almost nobody is building it.